DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock

September 1986 Revised March 2000

DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
General Description
The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change together when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (rippleclock) counters. The outputs of the four master-slave flip-flops are triggered by a LOW-to-HIGH level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other …ver más…

Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 7: ICC is measured with all outputs open, CLEAR and LOAD inputs grounded, and all other inputs at 4.5V.

Conditions VCC = Min, II = −18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIL = Max, VIH = Min IOL = 4 mA, VCC = Min VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 6) VCC = Max (Note 7)

Min

Typ (Note 5)

Max −1.5

Units V V

2.5 2.7

3.4 3.4 0.25 0.35 0.25 0.4 0.5 0.4 0.1 20 −0.4

V mA µA mA mA mA

−20 −20 19

−100 −100 34

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DM74LS193

AC Electrical Characteristics
From (Input) Symbol Parameter To (Output) RL = 2 kΩ CL = 15 pF Min fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL Maximum Clock Frequency Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time HIGH-to-LOW Level Output Count Up to Carry Count Up to Carry Count